Keynote Session 1: Agentic AI Infrastructure & Platform
Constraint-Driven Innovation: A Look at the AI Systems Problem
Peter DeSantis — SVP, Foundational AI Models, Custom Silicon, Quantum Computing, Amazon
Delivering on AI's promise takes an order-of-magnitude efficiency gain, not one more model or one faster chip — and that gain only comes from treating AI infrastructure as a whole-stack systems problem where models and silicon are co-designed and no layer of indirection sits between you and the hardware.
TL;DR
- It's day one. Amazon's day-one culture is an attitude, not a stage: however much you've already succeeded, more is ahead. DeSantis sees AI as squarely in day one, not on the cusp of being finished.
- The core problem is efficiency. Realizing the AI future everyone wants requires an order-of-magnitude improvement in infrastructure, not incremental gains.
- Observation 1: no single chip wins the next decade. The GPU was a happy accident — built for the thing it's named after, graphics — and is not the optimal architecture for today's models. AI models do predictable matrix and floating-point work, so memory and compute flow can be predicted, which is what makes a systolic array the right shape. That's the bet behind Trainium (originally Inferentia), placed the better part of a decade ago.
- Inference is really two workloads: prefill/encoding is extremely compute-intensive; autoregressive token generation is extremely memory-bandwidth-bound, since every subsequent token touches every model weight. SRAM-heavy chips speed up token generation but trade transistors for memory and struggle with the very long contexts agentic AI needs — so they complement rather than replace.
- Observation 2: models and chips must be designed in tandem. A model architecture is a multi-year, hundreds-of-millions-of-dollars commitment (soon billions); a leading AI chip takes two to three years from design to data-center scale. Two long-arc investments cannot be made in isolation from each other. Amazon brought its internal foundation model work closer to chip development about six months ago.
- Observation 3: this is a systems problem, not a model or chip problem. Whether you define performance as accuracy, latency, or throughput-and-cost, improving any of them requires understanding every layer of the stack.
- So Amazon deliberately removes abstractions: Trainium's full instruction set is exposed, the toolchain is open-sourced, and the stack integrates with PyTorch and vLLM.
Key Points
Opening: day one and AI optimism (~00:42–00:46)
Twenty-eight years at Amazon have made "day one" a familiar phrase — a culture you believe and will into existence, meaning that whatever you've built, more success lies ahead. It made obvious sense in a retail startup that fit in one conference room, felt silly once Amazon was a huge retailer, and felt true again when AWS launched twenty years ago and everyone inside the company was laughing at "this cloud thing."
DeSantis places himself on the far tail of the optimist distribution: he believes AI will help solve fundamental problems like energy, health, and medicine, and that we are seeing only the tip of the iceberg. But getting there requires order-of-magnitude improvements, and the single most fundamental problem is making AI far more efficient.
Observation 1: no single chip or server type will power the next decade (~00:47–00:54)
- A decade ago essentially everything ran on a CPU. Moore's law kept producing better general-purpose processors, one tool chain gave leverage, and supporting many hardware types made little sense for a company focused on its business.
- The cloud absorbed the pain of custom hardware, which is why AWS was already building bespoke silicon well before AI took off. Then AI arrived — and "AI" is really an ecosystem of workload types, with agentic AI pushing diversity faster still.
- The GPU is a phenomenal chip and a critical part of the origin story of modern models, but it was built for graphics and is not the optimal architecture for the models we run today.
- The insight, noticed the better part of a decade ago: AI models do a lot of matrix and floating-point math, but they do it in a fairly predictable way. If you can predict the flow of memory and compute through a chip, you don't need many cores with many registers doing random memory access — you want a systolic array.
- Trainium (originally Inferentia, later grown into a larger variant) is built on that architecture: strip out the flexibility these workloads don't need, keep the flexibility that lets it run a broad range of ML models. "It's not an ASIC customized for one application. It's an AI accelerator."
- Even so, one chip won't be the answer. Amazon sees another decade or two of novel innovation in training, and expects both itself and others to invest in additional chips — which makes the hardware ecosystem more interesting.
- Two workloads inside inference: prefill/encoding is compute-intensive; autoregressive decode is memory-bandwidth-bound because each token requires reading every weight. Their hardware profiles are radically different. Trainium runs both well — efficient memory flow serves decode, large floating-point throughput serves prefill.
- The specialization getting the most attention now is SRAM-heavy chips that trade compute capacity for on-chip memory to accelerate token generation. But the trade-offs bite: you've spent transistors on memory, you can't fit much memory on-chip anyway, and agentic AI needs very long contexts that are expensive to move in and out of SRAM. DeSantis expects such chips to be an important part of inference systems in the context of many other chips, not as a replacement.
Observation 2: models and chips must be designed in tandem (~00:54–00:57)
- Building an AI model is a multi-year commitment to an architecture costing hundreds of millions of dollars — soon, he suspects, billions for some model families. Every step of that investment needs to be efficient.
- Chip investment has the same shape: two to three years from design to production scale, given the complexity of leading AI processors.
- Developing models without knowing what happens in hardware a year out — or building hardware two years out without understanding model needs — is a mistake. Bringing the model, the system around it, and the silicon together is fundamental.
- A concrete lens: which capabilities do you put on the chip? Academia is one source of ideas (he noted a set of important Berkeley papers on the slide). Not every good idea makes it into production — not because it wasn't good, but because you only get so many design choices. "The art of building great hardware is understanding which of the great ideas ultimately need to be put into hardware."
- The features in the latest Trainium generation were selected this way, inspired by academic work as well as customer and internal research. About six months ago Amazon pulled its internal foundational model work closer to chip development, now a major part of DeSantis's remit.
Observation 3: AI infrastructure is a systems problem (~00:57–01:00)
- Because these systems are so interconnected, improving performance — however you define it (accuracy, latency, throughput and cost) — demands a complete understanding of every level of the stack. Done well, it draws on nearly every part of computer science and engineering, which is what makes it such a fun place to build.
- This produces a deliberately counterintuitive engineering stance. As a software engineer, his instinct is to insert a layer of indirection to scale — usually right for software, especially in a large organization, but wrong for an AI system chasing absolute best performance. There you need hands on the whole stack: the network, the chip, the hardware instruction-level capabilities of both.
- Hence Amazon exposes Trainium's complete instruction set (Berkeley students have helped push the limits there), open-sources the toolchain so people can see how the compiler and the rest of the software stack work, and integrates with PyTorch and vLLM.
Closing: constraints are the point (~01:00–01:01)
The world is full of constraints — capacity, performance, power — and that is exactly what makes this interesting. Events that gather experts from every part of the stack are critical to unlocking what comes from understanding the whole system. He closed where he started: this is the very beginning, and what lies ahead will be far more exciting than what we've seen.
Quotes
"It's always day one." (~00:44)
Not a description of company size — a deliberately maintained attitude.
"It's not an ASIC customized for one application. It's an AI accelerator that's been built specifically to optimally run the biggest and broadest range of AI models." (~00:51)
Trainium's positioning: strip the flexibility you don't need, keep the flexibility you do.
"The art of building great hardware is understanding which of the great ideas ultimately need to be put into hardware — so that by the time the hardware is in market, the science and the technology is ready to take advantage of that chip." (~00:57)
A two-to-three-year lead time forces you to bet at the paper stage.
"AI infrastructure is not a model problem. It's not a chip problem. It's a systems problem." (~00:57)
The spine of the talk, and the shared premise of the panel that followed.
"I have an instinctual desire to put a layer of indirection between things to scale — and that is usually the right way to build software … but it's not the right way to build an AI system if you want to achieve absolute best performance." (~00:59)
Why Trainium's full instruction set is public.
"The world is full of constraints — capacity constraints, performance constraints, power constraints. That's what makes this whole thing so interesting." (~01:00)
Where the talk's title comes from.
提到的專案與資源 / Projects & Resources
| 名稱 Name | 說明 | Description | 備註 Notes |
|---|---|---|---|
| AWS Trainium | Amazon 自研 AI 加速器,systolic array 架構;完整指令集公開 | Amazon's in-house AI accelerator built on a systolic array; full instruction set exposed | 原名 Inferentia,後長成更大變體 / originally Inferentia, later grown into a larger variant |
| AWS Inferentia | Trainium 的前身 | Trainium's predecessor | |
| Systolic array | 適合可預測記憶體/計算流的架構,Trainium 的基礎 | Architecture suited to predictable memory/compute flow; the basis of Trainium | |
| SRAM-heavy 推論晶片 | 把更多記憶體放上計算晶片以加速 token generation | Chips trading compute for on-chip memory to accelerate token generation | 未點名廠商;DeSantis 視為補位而非取代 / no vendor named; framed as complement, not replacement |
| PyTorch | Amazon 晶片軟體堆疊整合的生態關鍵元件 | Key ecosystem component the Amazon chip stack integrates with | |
| vLLM | 同上 | Same | 逐字稿誤聽為 "L uh BLM" / heard as "L uh BLM" |
| Amazon 開源 toolchain | 編譯器與軟體堆疊開源,供外界理解 | Open-sourced compiler and software stack | 正式名稱待確認 / official name to verify |
逐字稿勘誤 / Transcript Corrections
| 字幕原文 Heard as | 應為 Should be |
|---|---|
| Peter Dantis | Peter DeSantis |
| tranium / trrenium | Trainium |
| inferentia | Inferentia |
| L uh BLM | vLLM |
| a Gentic AI / aentic | agentic AI |
| SRAMM | SRAM |
| floatingoint / auto reggressive | floating-point / autoregressive |
| Don | Dawn (Song) |
待確認 / To Verify
- Amazon「開源 toolchain」的正式名稱與連結(推測與 AWS Neuron SDK / 其 kernel 介面相關,但演講未點名)。/ Official name and link for the open-sourced Amazon toolchain (likely related to the AWS Neuron SDK / its kernel interface, but not named in the talk).
- 「latest generation」Trainium 指的是哪一代與新增了哪些特性(投影片上有列表,語音未逐項念出)。/ Which Trainium generation "latest generation" refers to and which features were added (listed on a slide, not read aloud).
- 投影片上那批「很重要的 Berkeley 論文」是哪幾篇。/ Which Berkeley papers appeared on the slide.
- 「約六個月前把內部 foundational model 團隊與晶片開發拉近」是否有對應的公開組織異動公告。/ Whether the reorg bringing Amazon's foundational model team closer to chip development was publicly announced.